In this condition, output O0 (pin 2) of counter IC1 is high, while all other outputs are low. When switch S2 is pressed, transistor T1 conducts and capacitor C2 discharges via diode D1 and resistor R2, releasing the counter’s reset input. When S2 is released, T1 cuts off and its collector is pulled high, generating a rising edge on the counter’s input clock pin 14.
Electronic Combination Lock Circuit Diagram |
The time required for capacitor C1 to charge to logic high level is the maximum time that can lapse between switches pressed. Otherwise, the counter will reset. When all switches have been pressed in the correct sequence (S2-S7-S3-S4-S5-S2-S2 as shown), output O7 (pin 10) of the counter goes high for about ten seconds. This output is fed to driver transistor T2 to drive the solenoid valve and open the lock.
Assemble the circuit on a common PCB and enclose in a plastic cabinet. Connect the solenoid valve to the circuit using a flexible wire. While soldering, take care to avoid shortings. Use IC base for ease of troubleshooting. Connect the switches for opening the lock at the top of the plastic case.
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