Simple Noise limiter Circuit Diagram

This Noise limiter Circuit Diagram improves signal-to-noise ratio. It is connected between the detector output and the audio input (if high impedance) or at some relatively high-impedance section between two audio stages—preferably the low level stages.D1 and D2 can be any diode having relatively low forward resistance and very high back resistance. The circuit is excellent for receivers having bandwidths down to 2 or 3 kHz. Increase the value of Cl for receivers having narrower bandwidths . 

Noise limiter Circuit Diagram